This invention relates to optical processors and to methods of processing optical data, and in particular, though not exclusively, to processors and methods for implementing digital processing techniques.
In digital optical processing techniques, optical signals are subjected to logic operations by means of a non-linear device. Devices capable of performing logic operations may be in the form of non-linear spatial light modulators (SLMs), for example liquid crystal cells and interference cells. An example of a liquid crystal cell is that known as the Liquid Crystal Light Valve (LCLV) manufactured by Hughes Aircraft Corporation. Logic circuits may be created using SLMs as arrays of logic gates and an interconnection system and an imaging system to provide the necessary interconnections between the gate outputs of the array and the gate inputs. Two dimensional arrays of logic operations such as OR, NOR, AND, NAND, XOR and XNOR have been demonstrated in this way using a variety of optically addressed SLMs.
Two kinds of interconnections are described in "Architectural implications of a digital optical processor", Jenkins et al, Applied Optics, Vol. 23. No. 19 (October 1984) p. 3465-3474. The space variant interconnection method provides the most general interconnection system in which any gate output can be connected to any one of one or more gate inputs. This system is known as a space-variant interconnection system because the response of the system varies across the input to the interconnection system, so that each gate output sees a different routing configuration. One hologram element or "facet" is required for each logic gate. Clearly, while this system offers great flexibility due to the large number of different routing configurations provided, it is disadvantageous because it requires one facet for each logic gate. There is a limit on the number of facets that can be included on a hologram in an interconnection system, because of the need to maintain the space-bandwidth product (SWBP) at an acceptable level. This means that the space variant system is not suitable for many practical applications.
In the space invariant interconnection system, a single hologram provides a common routing configuration for all the logic gate outputs, so that the configuration defined for each gate output in the array is the same. This system avoids the disadvantages of the space variant interconnection system because it only requires one hologram for the whole output array, but is severely limited in its lack of flexibility in routing configuration. For practical use it requires that particular circuits be implemented by disabling the appropriate logic gates and this requires a separate addressing.
The reference identified above also discloses a hybrid system in which the gate outputs are distributed by means of a first holographic array onto the facets of a second holographic array. The second holographic array defines a finite number of interconnection patterns which is less than the number of the gates. However, the first hologram still have a facet for each of the logic gates in the array, and thus many facets are required.
The embodiment of processor described below does not require a facet for each logic gate but still allows sufficient flexibility in routing for algorithms of a regular structure.